1. Field of the Invention
The present invention relates to a semiconductor memory device, and more particularly to the technique of reducing or eliminating the noise interference among the bit lines of highly-integrated dynamic random-access memories.
2. Description of the Related Art
With the increasing needs for high speed logic performance of digital systems, it is demanded that dynamic random-access memories (hereinafter referred to as "DRAMs" as is generally called in the field of art) have higher integration density. In recent years, the integration density of DRAMs has been increased by means of the improved memory cell structure and/or the advanced micro-fabrication technology. However, the higher the integration density, the greater possibility of causing noise interference within the DRAMs, for the following reasons. The distance between any adjacent bit lines of a DRAMs is decreased due to the high integration density of the DRAM; and the coupling capacitance between the bit lines is increased. The large coupling capacitance results in a great interference noise among the bit lines. If the noise generated from the interference noise is greater than the effective potential difference of a signal supplied to a sense amplifier, the amplifier can no longer operate correctly, inevitably jeopardizing the data-reading operation of the DRAM.